As devices are progressively decreasing in size due to technical developments, use of metal such as aluminum (Al) during processing may cause numerous problems. Some more serious problems include a short-channel effect during a front-end process and an RC time constant delay during a Back-End-Of-the-Line (BEOL) process. To minimize the short-channel effect, optimization attempts for new device schematics, various ion implantation methods, junction depth fine control, etc. have been made. In addition, to minimize the RC time constant delay, attempts for the use of low dielectric constant materials, copper (Cu) interconnection, etc. have been made. In particular, electroplating methods have been frequently used for copper interconnection due to a simplified through-put process. Electroplating methods entail depositing copper ions on a wafer edge by the application of an electric field. To adopt the electroplating methods, a conductor material, e.g., a copper seed layer must be present on the wafer edge.
FIG. 1 illustrates a sectional view of a semiconductor device that includes inter metal dielectric (IMD) layer 12 formed on and/or over a semiconductor substrate or lower metal line 10. IMD layer 12 may have via-holes or contact-holes provided therein. Anti-diffusion layer 14 is formed on and/or over IMD layer 12 and inside the via-holes and, in turn, copper-plated layer 16 is formed on and/or over the anti-diffusion layer 14. For example, a copper seed layer may be formed on and/or over anti-diffusion layer 14 and then copper-plated layer 16 may be formed using the copper seed layer by an electroplating process.
In the case of the semiconductor device including a plurality of layers vertically stacked one above another as illustrated in FIG. 1, it is troublesome to deposit a copper seed layer using a separate process to form copper-plated layer 16 on a per layer basis. Further, since via-holes and trenches, in which the copper-plated layer will be buried, are decreasing in size due to rapid technical development, the gap-filling capability of the copper-plated layer has its limitations.